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Consider the traditional sleep() / wakeup() mechanism. In a single-CPU UNIX, this was elegant. In an SMP, it requires a "rendezvous" interrupt to all CPUs, flushing TLBs and invalidating cache lines. A 1994 benchmark on an SGI Challenge (12x MIPS R4400) showed that a simple select() loop on 1000 file descriptors caused 40% of kernel time to be spent in cross-CPU TLB shootdowns.
UNIX for Modern Architectures: Scalability, SMP, and the Post-RISC Era (1994) unix systems for modern architectures -1994- pdf
The traditional UNIX buffer cache—a pool of memory pages used to cache disk blocks—is obsolete on modern architectures for two reasons. First, the virtual memory system can now page directly from the filesystem (using mmap() and clustered pageins). Second, on SMP systems, the buffer cache lock becomes a global bottleneck. Consider the traditional sleep() / wakeup() mechanism
The optimal policy in 1994 is : bind a high-bandwidth device (e.g., FDDI or UltraSCSI controller) to a dedicated CPU. That CPU runs the interrupt handler, the device driver's bottom half, and the user process that consumes the data. This "pipeline" design, seen in Sequent's DYNIX/ptx, can achieve 85% linear scaling for network I/O. A 1994 benchmark on an SGI Challenge (12x
This paper examines how UNIX must be—and is being—re-architected for three pillars of the modern (1994) architecture: , non-uniform memory access (NUMA) , and 64-bit addressability .
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